Deliver high-quality digital design and verification across all programs (schedule, performance, silicon success) Achieve predictable execution with early risk identification and strong mitigation frameworks Improve first-pass silicon success rate through disciplined verification and robust design practices Enable faster time-to-market through reuse, automation, and methodology standardization Build the site into a self-sufficient digital & verification hub, reducing dependency on external sites  Responsibility  Own end-to-end digital design and verification delivery for the site Establish and drive verification strategy (simulation, formal, AMS/DMS) as a coherent, evolving plan Own digital architecture quality, including system control logic, FSM design, FW interfaces, and IP reuse Define and enforce sign-off criteria, including coverage, closure metrics, and design quality gates Align digital and verification execution with product roadmap, customer requirements, and business priorities  Direction (Strategic Leadership) Define a clear multi-year vision for digital and verification capabilities at the site Translate business and product strategy into technical roadmap and capability investments Drive adoption of best-in-class methodologies, tools, and automation frameworks Continuously adapt strategy based on execution gaps, competitive pressure, and program risk Elevate the role from task execution to systemic impact and organizational leverage  Alignment (Influence & Collaboration) Lead cross-functional alignment with analog, system, FW, product, and test teams Act as the primary the site interface for digital and verification in global reviews Align with other sites on IP reuse, methodology standardization, and sign-off practices Build strong partnerships with product line managers to ensure design meets system and market needs Ensure seamless integration across global teams for multi-site program delivery  Core Responsibilities 1. Technical & Architecture Leadership Guide architecture decisions for digital control systems, power management FSMs, and system interfaces Ensure robust design practices across:  RTL quality (coding standards, lint, CDC) Timing closure (STA, constraints) DFT/scan and test readiness Drive design reuse strategy to improve productivity and consistency  2. Verification Excellence Establish a world-class DV capability including:  Coverage-driven verification SystemVerilog/UVM environments Formal verification where applicable AMS/DMS co-simulation for mixed-signal validation Define verification plans that ensure full coverage and sign-off confidence Drive automation and regression efficiency to scale execution  3. Execution & Delivery Own delivery across all digital and DV activities with clear accountability Drive execution rigor:  Milestone planning Risk tracking and mitigation Transparent status reporting Ensure consistent on-time tape-out with high-quality silicon  4. Organization & Talent Build and scale a high-performing digital & verification team Define roles, expectations, and career progression aligned with job leveling frameworks Develop technical leaders and mentors to increase organizational leverage Drive hiring, retention, and capability growth aligned with site strategy  5. Methodology & Continuous Improvement Institutionalize standardized design and verification flows Drive continuous improvements in:  Productivity (reuse, automation) Quality (coverage, bug escape reduction) Efficiency (cycle time reduction) Promote a culture of data-driven decision making and engineering rigor  Expected Impact The site becomes a strategic execution hub for mixed-signal digital and verification Significant improvement in execution predictability and silicon success Increased engineering productivity without proportional headcount growth Strong pipeline of technical leaders and scalable expertise Enhanced customer confidence and competitive positioning  Profile & Leadership Bar Proven leader in digital IC design and/or verification at scale Track record of delivering complex mixed-signal SoCs end-to-end Deep expertise in:  RTL design, FSM/control logic Verification methodologies (UVM, formal, AMS/DMS) Ability to operate across strategy, system architecture, and execution simultaneously Strong leadership presence with the ability to influence across global teams