ASIC Design Engineer

Location: San Diego, CA Salary: $150,000.00 USD Annually - $240,000.00 USD Annually Description: Our client is currently seeking an ASIC Design Engineer to work hybrid in Palo Alto, CA or San Diego, CA.

• SoC and MAC architectures
• RTL implementation of wireless SoC and MAC modules from spec to tape out.
• Micro-architecture designs by working with architect and SW teams.
• Design HW accelerators which work with microcontrollers.
• Design memory access and memory sharing logic and control modules
• Design on-chip bus interconnect and peripheral controls.
• Design HW/SW control interfaces. Implement module level and top-level test and verifications

• Bachelor of Science in Electrical Engineering is required with at least 5 years of experience in Verilog RTL ASIC design and verification.
• Experience with ASIC/VLSI design and a track record of developing complex ASIC functions in successful products.
• Excellent logic design experience including high speed deep sub-micron design and power management/techniques for low power design.
• Experience with CPU, microcontrollers, SRAM memory control and arbitration hardware implementations.
• Experience with ASIC design tools for simulation, debugging, synthesis and timing analysis Knowledge of C/C/systemC and MAC algorithm modeling is a plus.
• Experience with backend interface, and silicon debug is a plus.