ASIC Design Verification Engineer

Your CareerAs a Design Verification engineer on the ASIC team, you will ensure that the ASICs in our groundbreaking next-generation firewall products meet or exceed industry-leading requirements for features, performance, and reliability.  You will define verification methodologies, architect test benches, write test plans, specify coverage, write tests, and debug.  You will work on diverse platforms including simulation, emulation, formal verification, and silicon validation.Your ImpactCollaborate with engineers in software, architecture, design, and verification teams to create comprehensive pre-silicon verification plans across simulation, emulation, and formal verificationPlan and execute every aspect of simulation test plans using sophisticated coverage-driven, constrained-random methodologiesDevelop flows, methodologies, and infrastructure for emulation - Create, run, and debug emulation tests in close collaboration with system architects, software engineers, and ASIC designersDefine new tools and methodologies to continuously improve quality and velocityCreate powerful programs in Python to automate triage, coverage closure, and metrics-driven verification