FPGA Design Verification Engineer

19 Feb 2025

Vacancy expired!

FPGA Verification MS in Electrical Engineering, Computer Engineering or equivalent 3+ years of experience in verification, preferably in communication systems Knowledge of System Verilog, UVM principles, bash/shell scripting, MATLAB, and Git Experience with Questasim

  • ID: #49295238
  • State: California Sunnyvale 94086 Sunnyvale USA
  • City: Sunnyvale
  • Salary: USD TBD TBD
  • Job type: Permanent
  • Showed: 2023-02-19
  • Deadline: 2023-04-20
  • Category: Et cetera