Full Time- Synthesis Architect opportunity (100% remote considered), to work with a company at the forefront of hardware technologies accelerating and optimizing FHE encryption via Artificial Intelligence.

Synthesis ArchitectFull time Opportunity in Campbell, CA (100% remote also considered). Our client is at the forefront of hardware technologies accelerating and optimizing FHE encryption via Artificial Intelligence. We expect to see performance gains in several orders of magnitude which will transform the 300B + Cloud market by ensuring security and stability of data transmission. Position: Synthesis/Formal Verification/

• Seeking a seasoned “Hands-on” Synthesis Architect with a minimum of 15+ year of experience to join our ASIC team. Person should have prior in defining the Synthesis Flows on the implementation plan. This means defining the methodology, setting up the environment and driving Synthesis, CDC, Lint, SDC promotion/Demotion, Scan connectivity and Formal Verification. Comprehensive understanding of the issues faced between the RTL, DFT and the Physical design Teams. Good understanding of clocking structures and tradeoffs between Power, area and timing.

• Expertise is SDC is mandatory.
• Leading ASIC infrastructure, defining methodology and driving the Synthesi/Frmal/DFT/PD
• Strong experience in Synthesis and Formal Verification.
• Work with Physical design/RTL team Time to refine constraints in on a Hierarchical SOC.
• Work with Timing team to consolidate Timing Modes. STA experience preferred.
• PERL /TCL/Python programming ability required.
• Prior tapeout experience required in a 16nm environment or smaller.
• Strong experience in a Cadence/Synopsys Tool environment.
• Strong communication and presentation skills.
• BSEE/MSEE is required.