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Title: Hardware Design Engineer 2Location: Mountain View ,CA (Onsite)Contract:2+ Month Job Description:Sponsor is looking for candidate to fulfill projects and role from April to June (3 months). Sponsor is interested in potentially extending them out as FTE if they are successful in the role and granted they have the budget approval.Knowledge of System of Verilog (systemverilog) 3+ years of experience: RTL simulation + debugSkills with memory scheduling/arbitration 3+ years of experienceUnderstand AXI protocol is a plus (big plus)Having MSFT Experience is a plusFront end digital design service which includes1) developing microarchitecture specification, developing RTL.2) physical-aware synthesis and timing/area/power analysis.3) scripting in TCL for QoR exploration and optimization. There could be other miscellaneous work as defined by the manager. • Degrees or certifications required – • Required Skills: Knowledge of System of Verilog (systemverilog) 3+ years of experience: RTL simulation + debug• Skills with memory scheduling/arbitration 3+ years of experience• Understand AXI protocol is a plus (big plus)• Having MSFT Experience is a plus
- ID: #49592012
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State: California
Mountainview
94035
Mountainview
USA
- City: Mountainview
- Salary: Depends on Experience
- Job type: Contract
- Showed: 2023-03-31
- Deadline: 2023-05-23
- Category: Et cetera