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- Design and build embedded memory or circuit blocks at the gate or transistor level
- Simulate and analyze the circuit design using transistor level simulators
- Extract the layout and perform post-layout simulations and verification
- Integrate characterization flow to extract timing and power information
- Develop scripts to automate characterization flow, simulations, and verification
- Specify and verify various behavioral and physical memory models
- Document the design specifications, behavioral description, and timing diagrams
- Good understanding of transistor level circuit behavior and device physics
- Good understanding of signal integrity analysis, EM/IR analysis, and reliability analysis
- Proficient in running simulators, writing automation scripts, and tools savvy
- Experience in development of embedded memory (SRAM, Register-Files, others) designs is a plus
- Good understanding of memory behavioral and physical models is a plus
- Good understanding of DFT schemes and chip level integration is a plus
- Good communication and interpersonal skills
- Motivated, self-driven and good at multi-tasking
- ID: #43297897
- State: California Irvine 92602 Irvine USA
- City: Irvine
- Salary: $80 - $100
- Job type: Contract
- Showed: 2022-06-19
- Deadline: 2022-08-16
- Category: Architect/engineer/CAD