Principal ASIC Design Verification Engineer

Our MissionAt Palo Alto Networks® everything starts and ends with our mission:Being the cybersecurity partner of choice, protecting our digital way of life.We have the vision of a world where each day is safer and more secure than the one before. These aren’t easy goals to accomplish – but we’re not here for easy. We’re here for better. We are a company built on the foundation of challenging and disrupting the way things are done, and we’re looking for innovators who are as committed to shaping the future of cybersecurity as we are.We’re changing the nature of work. Palo Alto Networks is evolving to meet the needs of our employees now and in the future through FLEXWORK, our approach to how we work. From benefits to learning, location to leadership, we’ve rethought and recreated every aspect of the employee experience at Palo Alto Networks. And because it FLEXes around each individual employee based on their individual choices, employees are empowered to push boundaries and help us all evolve, together.Your CareerAs a Design Verification engineer on the ASIC team, you will ensure that the ASICs in our groundbreaking next-generation firewall products meet or exceed industry-leading requirements for features, performance, and reliability. You will define verification methodologies, architect test benches, write test plans, specify coverage, write tests, and debug. You will work on diverse platforms including simulation, emulation, formal verification, and silicon validation.Your Impact

Collaborate with engineers in software, architecture, design, and verification teams to create comprehensive pre-silicon verification plans across simulation, emulation, and formal verification

Plan and execute every aspect of simulation test plans using sophisticated coverage-driven, constrained-random methodologies

Develop flows, methodologies, and infrastructure for emulation - Create, run, and debug emulation tests in close collaboration with system architects, software engineers, and ASIC designers

Define new tools and methodologies to continuously improve quality and velocity

Create powerful programs in Python to automate triage, coverage closure, and metrics-driven verification

Your Experience

BS in EE, CE, or CS required or equivalent military experience required - MSEE preferred

Minimum 8 years experience in ASIC design verification

Demonstrated success in taking multiple ASIC products from concept to mass production

Expertise in SystemVerilog and UVM

Technical strength in the following areas is required

Defining test plans, including comprehensive adversarial testing

Developing rich functional coverage models

Creating powerful and scalable test benches

Implementing sophisticated self-checking infrastructure with reference models and scoreboards

Developing reusable constrained-random tests

Debugging failures

Closing coverage

Experience in the following areas is preferred

Networking and cyber security

Formal property verification

Silicon validation - bringup, test, debug, and regression

Creating models in Python and C/C Writing driver code in C

Skilled in writing powerful, modular, and scalable programs in Python, Perl, and UNIX shell to automate verification tasks, especially regression testing

Demonstrated ownership and independence in planning, debugging complex failures, closing metrics-driven tasks, driving vendors, and reporting status

Strong leadership, collaboration, and communication skills

The TeamOur engineering team is at the core of our products and connected directly to the mission of preventing cyberattacks. We are constantly innovating — challenging the way we, and the industry, think about cybersecurity. Our engineers don’t shy away from building products to solve problems no one has pursued before.We define the industry instead of waiting for directions. We need individuals who feel comfortable in ambiguity, excited by the prospect of a challenge, and empowered by the unknown risks facing our everyday lives that are only enabled by a secure digital environment.Our CommitmentWe’re trailblazers that dream big, take risks, and challenge cybersecurity’s status quo. It’sWe’re trailblazers that dream big, take risks, and challenge cybersecurity’s status quo. It’s simple: we can’t accomplish our mission without diverse teams innovating, together.We are committed to providing reasonable accommodations for all qualified individuals with a disability. If you require assistance or accommodation due to a disability or special need, please contact us at accommodations@paloaltonetworks.com .Palo Alto Networks is an equal opportunity employer. We celebrate diversity in our workplace, and all qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or other legally protected characteristics.All your information will be kept confidential according to EEO guidelines.The compensation offered for this position will depend on qualifications, experience, and work location. For candidates who receive an offer at the posted level, the starting base salary (for non-sales roles) or base salary + commission target (for sales/commissioned roles) is expected to be between $159,800/yr to $258,500/yr. The offered compensation may also include restricted stock units and a bonus. A description of our employee benefits may be found here .