RTL Design & Integration Engineer

Yoh - A Day & Zimmerman Company
Santaclara, CA
17 Aug 2024

Vacancy expired!

RTL Design & Integration Engineer

As an RTL design engineer, you will collaborate with architects and implementation leads to define and implement RTL modules as required. Emphasis will be placed on minimizing power consumption while creating high quality, re-useable design.

ESSENTIAL DUTIES AND RESPONSIBILITIES:

  • Design and implement custom RTL modules for SoC.
  • Author detailed design specification documents.
  • Collaborate with DV engineers on test requirements to ensure bug free designs.
  • Evaluate performance, area, and power tradeoffs.
  • Drive coverage closure for your designs.

QUALIFICATIONS:

  • 5 or more years logic design experience.
  • RTL design experience with SystemVerilog; familiarity with SVA.
  • Understanding of low power design techniques.
  • Experience designing state machines, data paths, arbiters, and clock domain crossings.
  • Working knowledge of RTL quality assurance tools (Lint, CDC) and LEC preferred
  • Proficient with scripting languages and task automation.

Desired:

  • Experience with HLS (high level synthesis) highly desired

Yoh, a Day & Zimmermann company, is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.

Visit

https://www.yoh.com/applicants-with-disabilities to contact us if you are an individual with a disability and require accommodation in the application process.