Senior DFT Engineer

17 Apr 2024
Apply

Company:Qualcomm Atheros, Inc.Job Area:Engineering Group, Engineering Group > ASICS EngineeringGeneral Summary: The Digital ASIC Design Team is currently seeking candidates who will be responsible for the implementation and verification of DFT/DFD (Design for Test/Design for Debug) techniques for low power, multi voltage designs. The candidate should have solid hands-on experience with industry standard DFT techniques such as scan and MBIST. Job responsibilities include DFT pattern generation, coverage analysis and debug as well as running and debugging gate level simulations. The ideal candidate will have experience in both pre, and post-silicon in the DFT domainMinimum Qualifications: Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.ORMaster's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.ORPhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.Preferred Qualifications:

Minimum of 3+ years experience in the area of ASIC/DFT

In depth knowledge of DFT concepts

In depth knowledge and hands on experience in scan insertion, ATPG, coverage analysis, Transition delay test coverage analysis

Expertise in test mode timing constraints definition, knowledge in providing timing fixes/corrective actions for timing violations

Expertise in scripting languages such as perl, shell, etc.

Experience in simulating test vectors

Knowledge of equivalence check, DFT DRC rules both in RTL lint tool (like spyglass) and ATPG tool like (TK, TetraMax)

Working experience in Synopsis TetraMax/DFTMax and Cadence Encounter Test is a plus

Ability to work in an international team, dynamic environment

Ability to learn and adapt to new tools and methodologies.

Ability to do multi-tasking & work on several high priority designs in parallel.

Excellent problem solving skills

Excellent communication and team work skills and good English is required

Principal Duties & Responsibilities:

The person hired in to this role will be contributing to DFT insertion and validation effort of complex chip, core and/or blocks.

Analyze, propose best compression that can be achieved for given SoC/core/block

Own and deliver scan insertion, validate equivalence check

Debug/resolve any DRC issues, identify solution and work with front-end team to ensure DFT DRCs are fixed.

Analyzing and meeting ATPG coverage goals

Owns STA constraints and work with STA team to resolve timing violations

owns IDDQ constraints generation and validation

Working independently in the team to solve problems, enable his team to deliver on time with high quality

Responsible for deliverables of certain aspects of SoC DFT execution

Responsible for pattern verification and debug

Although this role has some expected minor physical activity, this should not deter otherwise qualified applicants from applying. If you are an individual with a physical or mental disability and need an accommodation during the application/hiring process, please call Qualcomm’s toll-free number found here (https://qualcomm.service-now.com/hrpublic?id=hrpublicarticleview&sysparmarticle=KB0039028) for assistance. Qualcomm will provide reasonable accommodations, upon request, to support individuals with disabilities as part of our ongoing efforts to create an accessible workplace.Qualcomm is an equal opportunity employer and supports workforce diversity.To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.Pay range: $143,000.00 - $215,000.00The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer!If you would like more information about this role, please contact Qualcomm Careers (http://www.qualcomm.com/contact/corporate) .EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification

Full-time
  • ID: #51498343
  • State: California Santaclara 95050 Santaclara USA
  • City: Santaclara
  • Salary: USD TBD TBD
  • Showed: 2024-04-17
  • Deadline: 2024-06-17
  • Category: Et cetera
Apply