Sr. Mask Design Engineer

03 Jul 2024

Vacancy expired!

Description
  • Samsung High-Speed Interface Lab is looking for a senior mask designer with experience in leading mixed-signal chip tape out and chip integration to lead a team layout engineers.

Required Qualifications:
  • BSEE in Electrical Engineering with 10+ years of mask design experience.
  • Experience in owning top-level of mixed-signal chips.
  • Experience in mask design for analog high-speed IP including CDR, DFE, CTLE.
  • Experience with tape-out planning and scheduling.
  • Experience with FinFET technology. Experience with the Samsung process is preferred.

  • ID: #43802942
  • State: California Sanjose 06484 Sanjose USA
  • City: Sanjose
  • Salary: Depends on Experience
  • Job type: Contract
  • Showed: 2022-07-03
  • Deadline: 2022-08-30
  • Category: Et cetera