Urgent Need ASIC Power Engineer with RTL at MTV, CA-Onsite

Role: ASIC Power Engineer with RTL Location: MTV, CA Contract Job Description: Run RTL power analysis tools and analyze the reports and make suggestions to improve power. Look at the simulation waveforms and check for correctness of the scenario Run experimental synthesis runs Skills:

• 5+ years of experience as an ASIC Design Engineer
• Experience in ASIC design flows and methodology including RTL, verification, synthesis, Static timing analysis (STA),
• Expertise with Verilog and RTL design
• Familiar with Primetime Static Time Analysis (STA)
• Good programming/scripting skills: Tcl, python, shell