Architect, design and verify CMOS analog blocks for custom ASICs to meet stringent performance, area, power and timeline constraints. Blocks include Rx, Tx, PLL and miscellaneous high-precision analog circuits.
Architect, design and verify CMOS analog blocks for custom ASICs to meet stringent performance, area, power and timeline constraints. Blocks include Rx, Tx, PLL and miscellaneous high-precision analog circuits.