IA Core Post Silicon Validation Engineer

Job DescriptionJoin Intel’s All Cores Engineering (ACE) Group as a Post Silicon Validation Engineer!Our team delivers Intel’s industry leading P-Core IP solutions to our Xeon Server products for Data Center and Cloud customers. The role will have an emphasis on Core RAS (Reliability Availability Serviceability) / MCA (Machine Check Architecture).Intel Architecture (IA) Core Post Silicon Validation Engineers are responsible for core level validation of the leading CPU products of each new Intel P-Core product. To bring these features and new platforms to market, a Core Post-Si Validation Engineer needs to be an expert in CPU Post-Si debug and validation, have knowledge in test generators for core level validation, be involved in tasks such as developing validation plans, 'powering on' the very first system built with Intel's latest and greatest CPU, validating product features, and identifying and debugging all functional bugs.Our Engineers have great opportunities to enhance their skills in validation architecture and design. Various validation techniques are used, such as emulation, while offering a unique hardware-software experience.In addition to various tools, languages and validation methodologies, Engineers will develop expertise with Intel Architecture and Micro Architecture and will be deeply involved in the process of defining new Intel features. They are independent, creative, with the willingness to innovate new solutions and demonstrate uncompromised quality in their work. Good communication and interaction skills among groups is also important.QualificationsYou must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum QualificationsThe candidate must have a Bachelor's Degree in Electrical/Computer Engineering or Computer Science and 6+ years of experience -OR- a Master's Degree in Electrical/Computer Engineering or Computer Science and 4+ years of experience -OR- a PhD in Electrical/Computer Engineering or Computer Science and 2+ years of experience in:

C or Perl or Python

CPU architecture / assembly

Debug

Preferred Qualifications

MCA (Machine Check Architecture)

RAS (Reliability Availability Serviceability)/ SER (Soft Error Rate)

Emulation

Chip logical validation concepts and methodologies

Inside this Business GroupThe Core and Client Development Group (C2DG) is a worldwide organization focused on the development and integration of SOCs, Core ™, and critical IPs that power Intel's leadership products, driving most of the Client roadmap for CCG, Delivering Server First Cores that enable continued growth for DCG and invest in future disruptive technologies.Covid StatementIntel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.Posting StatementAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.BenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.htmlWorking ModelThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.