Senior Verification Engineer

02 Dec 2024

Vacancy expired!

Solidus is searching for a Senior Verification Engineer.

The successful candidate will join a team that develops, builds and operates prototype space and airborne lasercom terminals. The technology developed and the lessons learned from these activities are transferred to operational programs through participation in standards groups and through the operation of a gold-standard test infrastructure. Major efforts include demonstration of a low-cost, high-performance airborne Lasercom terminal, design of Lasercom interoperability standards, development of a test capability to validate interoperability among various contractor-produced terminals, and investigation into techniques to enable multiple simultaneous Lasercom links through a single aperture. This group has close interactions with government and industrial partners.

Responsibilities: - Support FPGA design teams implementing high data rate digital interfaces for optical communications and airborne networking systems. - Function proficiently in an exclusively UNIX based environment with an in-depth familiarity of UNIX based scripting, Xilinx ISE, Xilinx Vivado, Modelsim/Questa, laboratory test equipment, network test equipment, and source/revision control tools including Subversion and GitHub. - Develop implementation architectures from requirements documents or high-level specifications with limited directions - Troubleshoot designs operating within an integrated system.

Required Skills: - US Citizenship and an active Secret Clearance - BS + 15 years of experience with the following: Develop implementation architectures from requirements documents or high-level specifications Verification engineering experience to support design teams MATLAB Experience with Kalman Filtering Experience working in a UNIX based environment with familarity of UNIX based scripting GateRocket hardware acceleration platform experience Troubleshoot designs operating within an integrated system Understanding of Universal Verification Methodology and System Verilog methodologies

- Requires the ability to participate and successfully execute team-based design verification processes in an existing high-functioning design team - Requires an in-depth understanding of Universal Verification Methodology and System Verilog methodologies supporting mixed-language VHDL/Verilog code development with advanced VHDL grammars - Must have excellent verbal and written communication skills, in-depth knowledge of Xilinx Virtex FPGAs and Ultrascale+ MPSoCs, DDR3 and DDR4 physical layers and GateRocket hardware acceleration platforms - Requires working knowledge and proven experience of one or more of the following disciplines: digital signal processing, adaptive signal processing and modulation and coding theory - Additionally, experience with implementation architectures utilizing Kalman Filtering as applicable to inertial navigation and transfer alignment is required

Preferred Skills: - Experience with Terrestrial network standards, ie: SONET, OTN, GFP, HDLC standards and RTL implementation methods - Additional languages including Perl, TCL, and System C is a plus.

Job ID: 4215

Applicants selected must meet eligibility requirements for access to classified information. U.S. Citizenship may be required. Solidus is an Equal Opportunity Employer and participates in E-Verify. NOTICE OF AFFIRMATIVE ACTION PLAN FOR INDIVIDUALS WITH DISABILITIES, DISABLED VETERANS AND OTHER PROTECTED VETERANS. It is the policy of this Company to seek and employ qualified individuals at all locations and facilities, and to provide equal employment opportunities for all applicants and employees in recruiting, hiring, placement, training, compensation, insurance, benefits, promotion, transfer, and termination. To achieve this, we are dedicated to taking affirmative action to employ and advance in employment qualified individuals with disabilities, disabled veterans, and other protected veterans. The objective in adopting the Affirmative Action Programs is to place qualified individuals with disabilities, disabled veterans and other protected veterans in all job classifications. These Affirmative Action Programs are available for inspection by any applicant or employee by contacting the Company's EEO Coordinator, in the Human Resources office, Monday through Friday, 8am to 5pm.

Please Note: Solidus does not accept applications from agencies, 3rd party vendors, or applications with incomplete information.