FPGA Design Verification Engineer

NEW FPGA DESIGN VERIFICATION ROLE SUPPORTING THE DEVELOPMENT OF THE F-35 JET FOR A TOP AEROSPACE & DEFENSE COMPANY JOB DESCRIPTION:The scope of work consists of Design Verification of VHDL developed for an FPGA. The task will include DV planning (i.e., verification and coverage plan development), creation of testbench infrastructure – whether from scratch or through re-use of existing code – testcase development, testing, debug, and coverage closure. Team leadership responsibilities may also be required for this role (schedule development/tracking, resource allocation, technical guidance, etc).Tasks to include:

Coverage and Verification plan documents describing verification flows and constructs, functionality to be verified, and testbench usage

Work Breakdown Structure (WBS), Gantt charts and/or other forms of a plan showing task breakdown, duration estimates, hand-ins, milestones, and task assignments;

SV/UVM Testbench infrastructure – environment, UVCs, monitors, predictors, checkers, coverage collectors – required for verifying the VHDL implementing FPGA functionality.

SV/UVM testcases for configuring the testbench and for generating the stimulus needed to verify the VHDL implements the functionality described in the FPGA specification.

Associated scripts and flows necessary for verification and simulation

Issue tracking to ensure all issues uncovered are resolved satisfactorily.

Revision / release control of all design verification source code and documentation produced as described in items 3.1.1 thru 3.1.4, above

Code and functional coverage reporting

JOB SKILLS & QUALIFICATIONS:

ELIGIBLE FOR A SECRET CLEARANCE

Required Design Tools and Revisions

SV/UVM Testbench infrastructure – environment, UVCs, monitors, predictors, checkers – and testcases needed for verifying the VHDL implementing FPGA functionality

Scripts, constraints, setup, or other associated files related to the testbench

Coverage and Verification plan documents describing verification flows and constructs, functionality to be verified, and testbench usage

Code and functional coverage reports

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The company is an equal opportunity employer and will consider all applications without regard to race, sex, age, color, religion, national origin, veteran status, disability, sexual orientation, gender identity, genetic information or any characteristic protected by law.If you would like to request a reasonable accommodation, such as the modification or adjustment of the job application process or interviewing process due to a disability, please email actalentaccommodation@actalentservices.com (%20actalentaccommodation@actalentservices.com) for other accommodation options.