Principal Package Design EngineerLocation: Hybrid at main Renesas Electronics America locations (San Jose, CA / Austin, TX)Department: Semiconductor Power Product GroupReports To: Senior Principal, Device Design Packaging Technology, Strategy, OperationsPosition SummaryWe are seeking a Principal Package Design Engineer to lead the development and integration of next-generation packaging solutions for high-performance semiconductors and electronic products. This role will focus on advanced package architecture, assembly processes, thermal and mechanical reliability, and cross-functional collaboration with design, applications, product engineering, manufacturing, suppliers, and quality teams. The ideal candidate has deep expertise in semiconductor packaging technologies and a strong track record of bringing complex products from concept through qualification and high-volume production.Key ResponsibilitiesLead Advanced Packaging Initiatives: Lead the design, development, and qualification of advanced semiconductor packaging solutions, including:Flip-chip, Chip EmbeddingWafer-level packaging (WLP/FOWLP)Panel-level packaging (laminate, molding)2.5D/3D packagingSystem-in-package (SiP)Ball grid array (BGA/CSP)Wafer-to-wafer and die-to-wafer heterogeneous bondingArchitecture & Simulation: Define package architecture based on electrical, thermal, mechanical, reliability, and cost requirements with hands-on, deep simulation expertise.OSAT & Vendor Strategy: Drive package technology and OSAT selection and development for new product introductions (NPI).Cross-Functional Collaboration: Work closely with IC design, product definers, substrate, board, thermal, reliability, applications, and manufacturing teams to ensure package compatibility and performance.Layout & Stack-Up: Oversee package layout reviews, stack-up definition, material selection, and interconnect strategy.Simulations & Modeling: Perform and guide others on simulations and analysis related to:Signal integrity / power integrityThermal performanceMechanical stress / warpageDesign for manufacturability (DFM)Assembly & Qualification: Develop assembly flows and process requirements for OSATs and manufacturing partners. Lead package qualification activities, including DOE planning, failure analysis, and reliability testing.Yield & Issue Resolution: Resolve packaging-related issues and challenges during NPI prototype builds, qualification, and production ramp. Collaborate with suppliers and internal/external manufacturing partners on process improvements, material evaluation, and yield optimization.Documentation & Leadership: Create and maintain package specifications, design rules, process documentation, and technical reports. Mentor junior engineers and provide technical leadership across packaging initiatives.